VLSI Wiki
Contents:
  1. 2.5D Integration
    1. 1. Definition: What is 2.5D Integration?
    2. 2. Components and Operating Principles
      1. 2.1 Interposer
      2. 2.2 ๋‹ค์ด (Die)
      3. 2.3 ์—ฐ๊ฒฐ ๊ธฐ์ˆ 
      4. 2.4 ์„ค๊ณ„ ๋ฐ ๊ตฌํ˜„ ๋ฐฉ๋ฒ•
    3. 3. Related Technologies and Comparison
      1. 3.1 3D Integration
      2. 3.2 2D Integration
      3. 3.3 ์‹ค์ œ ์‚ฌ๋ก€
    4. 4. References
    5. 5. One-line Summary

2.5D Integration

1. Definition: What is 2.5D Integration?

2.5D Integration๋Š” ๋ฐ˜๋„์ฒด ๊ธฐ์ˆ ์—์„œ ์ค‘์š”ํ•œ ๊ฐœ๋…์œผ๋กœ, ์นฉ์„ ์ˆ˜์ง์œผ๋กœ ์Œ“์ง€ ์•Š๊ณ  ์ˆ˜ํ‰์œผ๋กœ ๋ฐฐ์น˜ํ•˜์—ฌ ์„œ๋กœ ๋‹ค๋ฅธ ๊ธฐ๋Šฅ์„ ๊ฐ€์ง„ ์—ฌ๋Ÿฌ ์นฉ์„ ํ•˜๋‚˜์˜ ํŒจํ‚ค์ง€ ๋‚ด์—์„œ ํ†ตํ•ฉํ•˜๋Š” ๊ธฐ์ˆ ์„ ์˜๋ฏธํ•ฉ๋‹ˆ๋‹ค. ์ด๋Š” ํŠนํžˆ VLSI (Very Large Scale Integration) ์„ค๊ณ„์—์„œ ์ค‘์š”ํ•œ ์—ญํ• ์„ ํ•˜๋ฉฐ, ๊ณ ์† ๋ฐ์ดํ„ฐ ์ „์†ก๊ณผ ๋‚ฎ์€ ์ „๋ ฅ ์†Œ๋น„๋ฅผ ๋™์‹œ์— ๋‹ฌ์„ฑํ•  ์ˆ˜ ์žˆ๋„๋ก ๋•์Šต๋‹ˆ๋‹ค.

2.5D Integration์˜ ์ฃผ์š” ํŠน์ง•์€ Interposer๋ฅผ ์‚ฌ์šฉํ•œ๋‹ค๋Š” ์ ์ž…๋‹ˆ๋‹ค. Interposer๋Š” ์„œ๋กœ ๋‹ค๋ฅธ ๋‹ค์ด(die) ๊ฐ„์˜ ์ „๊ธฐ์  ์—ฐ๊ฒฐ์„ ์ œ๊ณตํ•˜๋ฉฐ, ์ด๋กœ ์ธํ•ด ๋ฐ์ดํ„ฐ ์ „์†ก ์ง€์—ฐ์„ ์ค„์ด๊ณ , ์‹ ํ˜ธ ๋ฌด๊ฒฐ์„ฑ์„ ํ–ฅ์ƒ์‹œํ‚ฌ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Ÿฌํ•œ ๊ธฐ์ˆ ์€ ํŠนํžˆ ๊ณ ์„ฑ๋Šฅ ์ปดํ“จํŒ…, AI, ๊ทธ๋ฆฌ๊ณ  ๋ฐ์ดํ„ฐ ์„ผํ„ฐ์™€ ๊ฐ™์€ ๋ถ„์•ผ์—์„œ ํ•„์ˆ˜์ ์ž…๋‹ˆ๋‹ค.

2.5D Integration์˜ ์ค‘์š”์„ฑ์€ ๋‹ค์Œ๊ณผ ๊ฐ™์Šต๋‹ˆ๋‹ค. ์ฒซ์งธ, ๋‹ค์ˆ˜์˜ ๊ธฐ๋Šฅ์„ ๊ฐ€์ง„ ์นฉ์„ ํ†ตํ•ฉํ•จ์œผ๋กœ์จ ๊ณต๊ฐ„ ํšจ์œจ์„ฑ์„ ๊ทน๋Œ€ํ™”ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋‘˜์งธ, ๋‹ค์–‘ํ•œ ๊ธฐ์ˆ  ๋…ธ๋“œ์—์„œ ์ œ์กฐ๋œ ์นฉ์„ ๊ฒฐํ•ฉํ•  ์ˆ˜ ์žˆ์–ด ์„ค๊ณ„ ์œ ์—ฐ์„ฑ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค. ์…‹์งธ, ์ „๋ ฅ ์†Œ๋น„๋ฅผ ์ค„์ด๋ฉด์„œ๋„ ์„ฑ๋Šฅ์„ ํ–ฅ์ƒ์‹œํ‚ฌ ์ˆ˜ ์žˆ๋Š” ๊ธฐํšŒ๋ฅผ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค. ์ด๋Ÿฌํ•œ ์ด์œ ๋กœ 2.5D Integration์€ ์ตœ์‹  ๋ฐ˜๋„์ฒด ๊ธฐ์ˆ ์˜ ๋ฐœ์ „์— ์ค‘์š”ํ•œ ๊ธฐ์—ฌ๋ฅผ ํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

2. Components and Operating Principles

2.5D Integration์˜ ๊ตฌ์„ฑ ์š”์†Œ์™€ ์ž‘๋™ ์›๋ฆฌ๋Š” ๋‹ค์Œ๊ณผ ๊ฐ™์ด ์„ค๋ช…ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

2.1 Interposer

Interposer๋Š” 2.5D Integration์˜ ํ•ต์‹ฌ ๊ตฌ์„ฑ ์š”์†Œ๋กœ, ๋‹ค์–‘ํ•œ ๋‹ค์ด ๊ฐ„์˜ ์ „๊ธฐ์  ์—ฐ๊ฒฐ์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•ฉ๋‹ˆ๋‹ค. ์ผ๋ฐ˜์ ์œผ๋กœ ์‹ค๋ฆฌ์ฝ˜์œผ๋กœ ์ œ์ž‘๋˜๋ฉฐ, ์—ฌ๋Ÿฌ ๊ฐœ์˜ I/O ํฌํŠธ๋ฅผ ํฌํ•จํ•˜์—ฌ ๊ฐ ๋‹ค์ด์™€์˜ ์—ฐ๊ฒฐ์„ ์ง€์›ํ•ฉ๋‹ˆ๋‹ค. Interposer๋Š” ๋˜ํ•œ ์‹ ํ˜ธ์˜ ์ „์†ก ์ง€์—ฐ์„ ์ตœ์†Œํ™”ํ•˜๊ณ , ์ „๋ ฅ ๋ถ„๋ฐฐ๋ฅผ ์ตœ์ ํ™”ํ•˜๋Š” ์—ญํ• ์„ ํ•ฉ๋‹ˆ๋‹ค.

2.2 ๋‹ค์ด (Die)

๊ฐ๊ฐ์˜ ๋‹ค์ด๋Š” ํŠน์ • ๊ธฐ๋Šฅ์„ ์ˆ˜ํ–‰ํ•˜๋Š” ๋ฐ˜๋„์ฒด ์นฉ์œผ๋กœ, ์˜ˆ๋ฅผ ๋“ค์–ด ํ”„๋กœ์„ธ์„œ, ๋ฉ”๋ชจ๋ฆฌ, ๋˜๋Š” ํŠน์ˆ˜ ๊ธฐ๋Šฅ์„ ๊ฐ€์ง„ ์นฉ์ผ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ด๋Ÿฌํ•œ ๋‹ค์ด๋Š” Interposer ์œ„์— ์ˆ˜ํ‰์œผ๋กœ ๋ฐฐ์น˜๋˜๋ฉฐ, ์„œ๋กœ ๊ฐ„์˜ ๋ฐ์ดํ„ฐ ์ „์†ก์„ ํ†ตํ•ด ๋ณตํ•ฉ์ ์ธ ๊ธฐ๋Šฅ์„ ์ˆ˜ํ–‰ํ•ฉ๋‹ˆ๋‹ค.

2.3 ์—ฐ๊ฒฐ ๊ธฐ์ˆ 

2.5D Integration์—์„œ ๋‹ค์ด ๊ฐ„์˜ ์—ฐ๊ฒฐ์€ ์—ฌ๋Ÿฌ ๊ฐ€์ง€ ๊ธฐ์ˆ ์„ ํ†ตํ•ด ์ด๋ฃจ์–ด์ง‘๋‹ˆ๋‹ค. ๋Œ€ํ‘œ์ ์ธ ๊ธฐ์ˆ ๋กœ๋Š” Through-Silicon Via (TSV)์™€ Micro-bump ๊ธฐ์ˆ ์ด ์žˆ์Šต๋‹ˆ๋‹ค. TSV๋Š” ์‹ค๋ฆฌ์ฝ˜ ๋‹ค์ด ๋‚ด๋ถ€๋ฅผ ๊ด€ํ†ตํ•˜๋Š” ์ˆ˜์ง ์—ฐ๊ฒฐ๋กœ, ๋†’์€ ๋ฐ€๋„์˜ ์—ฐ๊ฒฐ์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•ฉ๋‹ˆ๋‹ค. Micro-bump๋Š” ๋‹ค์ด ๊ฐ„์˜ ์ˆ˜ํ‰ ์—ฐ๊ฒฐ์„ ์œ„ํ•œ ์ž‘์€ ๋ฒ”ํ”„๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ ์ „๊ธฐ์  ์ ‘์ด‰์„ ํ˜•์„ฑํ•ฉ๋‹ˆ๋‹ค.

2.4 ์„ค๊ณ„ ๋ฐ ๊ตฌํ˜„ ๋ฐฉ๋ฒ•

2.5D Integration์˜ ์„ค๊ณ„ ๊ณผ์ •์€ ๋ณต์žกํ•˜๋ฉฐ, Digital Circuit Design์˜ ์›์น™์„ ๋”ฐ๋ฆ…๋‹ˆ๋‹ค. ์„ค๊ณ„์ž๋Š” ๊ฐ ๋‹ค์ด์˜ ๊ธฐ๋Šฅ์„ ๊ณ ๋ คํ•˜์—ฌ ์ตœ์ ์˜ ๋ฐฐ์น˜๋ฅผ ๊ฒฐ์ •ํ•˜๊ณ , Timing๊ณผ Circuit Behavior๋ฅผ ๋ถ„์„ํ•˜์—ฌ ๋ฐ์ดํ„ฐ ์ „์†ก ๊ฒฝ๋กœ๋ฅผ ์ตœ์ ํ™”ํ•ด์•ผ ํ•ฉ๋‹ˆ๋‹ค. ์ด ๊ณผ์ •์—์„œ Dynamic Simulation์„ ํ†ตํ•ด ์„ค๊ณ„์˜ ์œ ํšจ์„ฑ์„ ๊ฒ€์ฆํ•˜๊ณ , Clock Frequency๋ฅผ ์กฐ์ •ํ•˜์—ฌ ์ „์ฒด ์‹œ์Šคํ…œ์˜ ์„ฑ๋Šฅ์„ ๊ทน๋Œ€ํ™”ํ•ฉ๋‹ˆ๋‹ค.

2.5D Integration์€ ์—ฌ๋Ÿฌ ์œ ์‚ฌ ๊ธฐ์ˆ ๊ณผ ๋น„๊ตํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ์ฃผ์š” ๋น„๊ต ๋Œ€์ƒ์€ 3D Integration๊ณผ 2D Integration์ž…๋‹ˆ๋‹ค.

3.1 3D Integration

3D Integration์€ ์—ฌ๋Ÿฌ ๊ฐœ์˜ ๋‹ค์ด๋ฅผ ์ˆ˜์ง์œผ๋กœ ์Œ“์•„ ์˜ฌ๋ฆฌ๋Š” ๊ธฐ์ˆ ๋กœ, ๊ณต๊ฐ„ ํšจ์œจ์„ฑ ์ธก๋ฉด์—์„œ ๋›ฐ์–ด๋‚œ ์žฅ์ ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค. ๊ทธ๋Ÿฌ๋‚˜, ์ œ์กฐ ๊ณต์ •์˜ ๋ณต์žก์„ฑ๊ณผ ์—ด ๊ด€๋ฆฌ ๋ฌธ์ œ๋กœ ์ธํ•ด 2.5D Integration๋ณด๋‹ค ๊ตฌํ˜„์ด ์–ด๋ ค์šธ ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. 3D Integration์€ ๊ณ ์† ๋ฐ์ดํ„ฐ ์ „์†ก์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•˜์ง€๋งŒ, ์ „๋ ฅ ์†Œ๋ชจ๊ฐ€ ๋” ํด ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.

3.2 2D Integration

2D Integration์€ ๋™์ผํ•œ ํ‰๋ฉด์—์„œ ์—ฌ๋Ÿฌ ๋‹ค์ด๋ฅผ ๋ฐฐ์น˜ํ•˜๋Š” ๋ฐฉ์‹์œผ๋กœ, ๊ตฌํ˜„์ด ๊ฐ„๋‹จํ•˜์ง€๋งŒ ๊ณต๊ฐ„ ํšจ์œจ์„ฑ์ด๋‚˜ ์ „์†ก ์†๋„์—์„œ ํ•œ๊ณ„๊ฐ€ ์žˆ์Šต๋‹ˆ๋‹ค. 2D Integration์—์„œ๋Š” ๊ฐ ๋‹ค์ด ๊ฐ„์˜ ๊ฑฐ๋ฆฌ๊ฐ€ ๋ฉ€์–ด์งˆ ์ˆ˜ ์žˆ์–ด, ๋ฐ์ดํ„ฐ ์ „์†ก ์ง€์—ฐ์ด ๋ฐœ์ƒํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค. ๋ฐ˜๋ฉด, 2.5D Integration์€ Interposer๋ฅผ ํ†ตํ•ด ์ด ๋ฌธ์ œ๋ฅผ ํ•ด๊ฒฐํ•˜๊ณ , ๋ณด๋‹ค ๋†’์€ ์„ฑ๋Šฅ์„ ์ œ๊ณตํ•ฉ๋‹ˆ๋‹ค.

3.3 ์‹ค์ œ ์‚ฌ๋ก€

2.5D Integration์€ AMD์˜ Fiji GPU์™€ ๊ฐ™์€ ๊ณ ์„ฑ๋Šฅ ๊ทธ๋ž˜ํ”ฝ ์นด๋“œ์—์„œ ์‚ฌ์šฉ๋˜๊ณ  ์žˆ์œผ๋ฉฐ, ์ด๋Š” ๋ฉ”๋ชจ๋ฆฌ์™€ ํ”„๋กœ์„ธ์„œ ๊ฐ„์˜ ๋น ๋ฅธ ๋ฐ์ดํ„ฐ ์ „์†ก์„ ๊ฐ€๋Šฅํ•˜๊ฒŒ ํ•ฉ๋‹ˆ๋‹ค. ๋˜ํ•œ, Xilinx์˜ Versal ACAP์™€ ๊ฐ™์€ AI ํ”„๋กœ์„ธ์„œ์—์„œ๋„ 2.5D Integration ๊ธฐ์ˆ ์ด ์ ์šฉ๋˜์–ด, ๋‹ค์–‘ํ•œ ๊ธฐ๋Šฅ์„ ํ†ตํ•ฉํ•˜๊ณ  ์„ฑ๋Šฅ์„ ๊ทน๋Œ€ํ™”ํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

4. References

  • IEEE (Institute of Electrical and Electronics Engineers)
  • SEMI (Semiconductor Equipment and Materials International)
  • TSMC (Taiwan Semiconductor Manufacturing Company)
  • AMD (Advanced Micro Devices)
  • Xilinx

5. One-line Summary

2.5D Integration์€ ์„œ๋กœ ๋‹ค๋ฅธ ๊ธฐ๋Šฅ์„ ๊ฐ€์ง„ ๋‹ค์ด๋ฅผ Interposer๋ฅผ ํ†ตํ•ด ํ†ตํ•ฉํ•˜์—ฌ ๊ณ ์† ๋ฐ์ดํ„ฐ ์ „์†ก๊ณผ ๋‚ฎ์€ ์ „๋ ฅ ์†Œ๋น„๋ฅผ ๊ตฌํ˜„ํ•˜๋Š” ๋ฐ˜๋„์ฒด ๊ธฐ์ˆ ์ž…๋‹ˆ๋‹ค.