Normal Computing Deep Dive: The AI EDA and the CN101 Thermodynamic Chip Built by Google Alumni, Backed by $85M and Samsung Catalyst

The 30-Second Summary

• Normal Computing computes with noise instead of fighting it. A conventional chip spends energy suppressing transistor fluctuations and thermal noise to hold deterministic zeros and ones. Normal's Carnot architecture does the opposite: it lets a physical system relax toward equilibrium and samples the answer from the resulting distribution. The company calls these physics-based ASICs.
• The revenue engine is EDA, not the chip. Normal EDA is an AI-native design platform built on auto-formalization, which combines large language models with formal logic to turn specifications into formal models and automate design and verification. According to the company, more than half of the top ten semiconductor companies by revenue are partners, and the near-term goal is to get custom silicon to market 2x faster.
• The silicon proof is real but small. CN101, taped out in July 2025 and described by the company as the world's first thermodynamic computing chip, is a digital CMOS test chip. The results presented at Hot Chips 2026 are MNIST digit generation on a single chip and CIFAR-10 image generation across six chips. The company itself calls them small-scale results.
• The 1,000x figure is a roadmap, not a measurement. Up to 1,000x energy efficiency is the company's target and claim for targeted workloads. It has not been validated by a third party on a commercial product. CN201 in 2026 and CN301 in late 2027 to early 2028 are the chips that have to prove it.
• Samsung's strategic fund led the round. In March 2026 Samsung Catalyst Fund led a $50 million raise that took total funding past $85 million, and the company officially announced future expansion in Korea. That is the core of the Korean angle on this company.

Company Overview

Founding Story: From Probabilistic AI to Semiconductors

Normal Computing started in New York in 2022. Founders Faris Sbahi, Matthias Tan and Antonio Martinez were engineers who had built large-scale AI systems at Google Brain, Google X and Palantir. The first flag the company planted in early 2023 was not semiconductors but probabilistic AI: controlling the hallucination problem of generative AI, outputs that are plausibly wrong, with probabilistic models. The $8.5 million seed round, closed in January 2023 and led by Celesta Capital and First Spark Ventures with Micron Ventures participating, was explained in those terms.

But a second seed was planted at the same time. A paper published in early 2023, "Thermodynamic AI and the Fluctuation Frontier," grouped diffusion models, Bayesian neural networks, Monte Carlo methods and simulated annealing into a single class of probabilistic computation, and proposed stochastic hardware that could accelerate all of it. The company's center of gravity then moved quickly toward semiconductors, for a practical reason: chip design is the industry that needs probabilistic computation most desperately and pays the highest price for getting it wrong, in respins that cost tens of millions of dollars.

The logic of the pivot runs like this. Chip design is decision-making under uncertainty. Specifications are incomplete, verification never truly ends, and first-silicon success rates are low. Attaching AI to that process only works if the AI's output can be proven right or wrong; an unverifiable assistant cannot be trusted with production silicon. So Normal chose formal methods as the coupling, auto-formalization. And instead of only helping other companies design their chips, it set out to design, with its own tools, the kind of chip that conventional EDA handles worst: its own thermodynamic chip, as a standing proof of the toolchain.

Normal EDA Dissected: What Auto-Formalization Actually Means

Auto-formalization, the core concept of Normal EDA, is a frontier AI research term. It originally referred to automatically translating mathematics from natural language into formal languages. Normal transplanted it into semiconductor design. An LLM reads specifications in many forms, from architecture documents and micro-architecture descriptions to truth tables and timing diagrams, and converts the intent into a model in formal logic. Once a design exists as a formal model, the conversation changes: whether the design satisfies the specification becomes a question of proof, not plausibility.

Combining the company's explanations, the platform works in four steps. First, it is trained end-to-end on a team's specifications and verification collateral, building an internal representation of intent and goals. Second, it interprets non-textual inputs multimodally, deriving stimulus and checks from timing diagrams and waveform images. Third, on top of that formal model it designs, optimizes and proves the correctness of the silicon, continually learning. Fourth, where the spec is incomplete or ambiguous, it infers likely behavior, proposes tests, and routes them through a human-in-the-loop approval process. The current commercial scope is DV (design verification) and RTL automation, with end-to-end and unconventional silicon workflows stated as the expansion path.

The collision point with incumbent EDA is clear. The agentic EDA offerings of Synopsys and Cadence also insert LLM agents into the design flow, but their starting point is automation layered on decades of proprietary toolchains. Normal's claim is that the order is reversed: a provable formal model sits at the center and AI works around it. Fittingly for a verification-centric company, Normal is a founding member of the Si2 (Silicon Integration Initiative) LLM Benchmarking Coalition, working on how AI-assisted design should be measured.

The honest limits deserve equal billing. Partner names are undisclosed, and "more than half of the top ten" is the company's own figure. There is a visible gap between the ambition of cutting design cycles from years to months and the CEO's current claim of 2x faster time to market. That said, PitchBook classifies the company as generating revenue, and Samsung Catalyst's decision to lead after diligence reads as an indirect signal that the platform has moved beyond unpaid pilots.

The Physics: Determinism's Three Costs

To understand the Carnot program, start with what conventional chips pay for probability. The framing the company's papers repeat is that determinism bills you three times.

First, the cost of suppression. Transistors fluctuate by nature. A digital circuit's stable zeros and ones are bought with noise margins and error suppression, and the currency is energy. Second, the cost of generation. Probabilistic algorithms such as diffusion need noise terms. A deterministic machine fakes that randomness expensively, with software random-number generation. Third, the cost of synchronization. Lockstep synchronization burns energy and latency on ordering that probabilistic semantics never required.

Thermodynamic computing refuses all three invoices. Instead of suppressing a physical system's fluctuations, dissipation and stochasticity, it uses the system's relaxation toward an equilibrium distribution as the computation itself. For problems whose answer is a sample from a distribution, this is cheap in principle. It is symbolic that a diffusion model's governing equation ends in a white-noise term: the noise the algorithm needs anyway can be supplied by the noise the hardware already has.

Positioning matters. This chip is not a GPU replacement. Exact deterministic computation, accounting or operating systems, remains digital territory. Carnot targets the accelerator seat next to CPUs and GPUs for workloads where probability is intrinsic: sampling, linear algebra, Bayesian inference and generative model inference. It neighbors the seat quantum computing wants, but it is built in room-temperature standard CMOS, which is a very different manufacturing proposition.

CN101: The Silicon Evidence and Its Limits

Before CN101, the company published its first experimental thermodynamic computer in Nature Communications in 2025: an SPU (Stochastic Processing Unit) of eight coupled analog cells on a printed circuit board, a prototype that demonstrated the principles of thermodynamic AI in hardware. CN101 is the first implementation moved into a digital CMOS chip. Per the company, it is manufacturable in standard processes, and its tiles run asynchronously on independent local clocks.

The disclosed CN101 specification is modest. Four compute tiles with 64 state variables each address 256-dimensional problems, state variables are 32-bit, and a reconfigurable NoC handles tile-to-tile communication. The company explicitly calls it a test chip: it carries relatively low-speed I/O, and its purpose is to verify that scalable thermodynamic computing holds in silicon, not to post commercial performance. It targets two operations: linear algebra and matrix operations, and stochastic sampling using the company's own discretization, LRW (Lattice Random Walk). LRW is designed to carry the same convergence guarantees as Euler-Maruyama, the standard discretization of stochastic differential equations, and the company says the LRW paper has been accepted by npj Unconventional Computing.

The results presented at Hot Chips 2026 are these. A conditional variational autoencoder generated MNIST handwritten digits on a single CN101 chip. A convolutional flow-matching model generated CIFAR-10 images across six chips operating as one system, reproducing the floating-point reference at a pixel error of about 0.06. For a 100-layer generation, a ten-layer network unrolled over ten integration steps, running all layers relaxed concurrently reached the same image quality in 62x fewer cycles than the sequential run, according to the company. The arXiv version of the work also includes a scientific-computing result, free-energy estimation on alanine dipeptide.

The scale deserves an honest read. MNIST and CIFAR-10 are textbook benchmarks, not 2026 production workloads. The company itself calls these small-scale results and draws the line carefully: what is validated is the primitives, that probabilistic state evolution works in digital CMOS and composes into working generative models. The 62x figure is a cycle count in a specific execution comparison, not an energy number. The 1,000x energy-efficiency claim was not measured on this chip.

Roadmap: What CN201 and CN301 Have to Prove

The roadmap's structure is clean. CN101 asks "does it work," CN201 asks "is it useful," and CN301 asks "does it change the game." For an investor, the inflection is CN201. If a power advantage on high-resolution diffusion shows up in a form third parties can check, thermodynamic computing graduates from a paper topic to a procurement topic. If it does not, the program remains a long research project.

Money: What Samsung Catalyst Leading Actually Means

Read the composition, not just the amount. Samsung Catalyst Fund runs strategic investments for Samsung. Its head, Dede Goldschmidt, cited the platform's potential to offer faster time-to-market for the most demanding chip design customers. When the lead investor is not a financial fund but a potential customer's ecosystem owner, the reasonable reading is that the EDA platform was evaluated as a real product inside Samsung's diligence process. Micron Ventures staying in from seed through Series B is the same pattern: two memory companies have been on the cap table from early on.

The UK government's ARIA funding part of the thermodynamic work through its Scaling Compute Programme is another unusual signal. An American company, funded in part by a British high-risk research agency, whose programme director publicly called working CN101 silicon an exceptionally rare outcome for work this ambitious. Government grants are not revenue, but they are a form of technical diligence that can be read as evidence.

The valuation is not disclosed. Judging by raise size and stage, Normal sits in the phase of proving platform revenue, with the hardware program financed by the time that revenue engine buys.

The Competitive Map

Competition runs on two layers. In EDA, "AI helps design chips" is already the industry's consensus direction; the contest is who first earns the trust of production silicon. In hardware, there is a same-paradigm rival in Extropic, and behind it the analog and probabilistic computing research of large labs such as IBM. Normal's uniqueness is holding both layers in one company and using each to prove the other.

The Korea Angle and the MBA Angle

Three things make this company interesting from a Korean seat. First, the lead investor is Samsung's strategic fund, and the company has officially stated it will expand in Korea. If a Korean office appears, its role is not hard to infer, and this inference should be labeled as such: joint work with some of the world's largest design and manufacturing customers in Samsung Foundry, System LSI and the memory business, and hiring from Korea's design and verification talent pool. Second, the customer geometry of Normal EDA. If the company's claim of partnering with more than half of the top ten semiconductor companies is accurate, a Korean name is likely on that list. Third, memory-adjacent computing after HBM. PIM (processing in memory) and probabilistic computing sit at different layers, but they share a problem statement: cut data movement and compute closer to the physics. Micron's presence as an early investor is unlikely to be unrelated to that intersection.

From an MBA seat, the company's structure itself is the case study. Normal runs a classic two-engine model. Engine one, EDA, creates subscription and pilot revenue, large-customer references and, above all, time. Engine two, the thermodynamic chip, would redefine the company if it works, but it carries a high failure probability and a payback measured in years. Designing engine two with engine one, using dogfooding as the proof device, is the elegant move in this structure: a chip built with its own EDA that works in silicon is the strongest possible sales evidence for the EDA, and the workflow data from EDA customers tells the company which chips are worth building.

The reverse risk is also structural. The two engines recruit from different talent markets, sell on different cycles and define success differently. The large semiconductor companies that are EDA customers are simultaneously the referees of the hardware roadmap. And the model only holds while engine one actually earns. If EDA revenue stalls at pilots instead of converting to production contracts, the company collapses back into one expensive research organization.

Counterarguments and Risks

• Paradigm earliness. Researchers in this field have compared today's thermodynamic computing to quantum computing in the 1990s: principles demonstrated, useful scale far away. Normal's roadmap is a plan to close that gap by 2028, and it should be read with that gap in mind.
• The 1,000x claim is unverified. Up to 1,000x energy efficiency is a company target for targeted workloads. The CN101 results are cycle counts and small-scale generation quality, not power comparisons on commercial workloads. CN201's independent validation is the first real test.
• Verifying a chip whose answers are distributions. A stochastic chip cannot be signed off with methodology built for deterministic guarantees of timing and function. Accepting statistical guarantees requires a new methodology. That is a risk for Normal and, paradoxically, exactly the problem its EDA has to sell the solution to.
• No software ecosystem yet. However efficient the silicon, it does not sell unless it runs on PyTorch-class stacks. Programming models, compilers and libraries are the most expensive layer for a startup, as costly as the silicon itself.
• Customer roadmap dependence. EDA revenue tied to a handful of large customers' design schedules means one customer's program slip can move a quarter.
• Capital consumption. Reaching CN301 requires substantial further raises. If the current runway ends before CN201 results land, the company returns to market on weaker terms.
• Incumbent bundling. If the EDA majors fold agentic features into existing bundles at effectively no incremental price, an independent EDA startup's pricing power narrows quickly.

Timeline

FAQ

Q: What exactly does Normal Computing sell? A: Two things. Normal EDA is an AI-native chip design platform that automates design and verification through auto-formalization, turning specifications into formal models. The second is the Carnot program's thermodynamic computing chips, which are not yet a commercial product: CN101 is a test chip.

Q: What is thermodynamic computing? A: Computing that uses a chip's physical fluctuations and noise directly instead of suppressing them. The system relaxes toward an equilibrium distribution, and that relaxation performs sampling and probabilistic computation. The company argues this suits workloads whose essence is drawing samples from probability distributions: diffusion models, Bayesian inference and linear algebra.

Q: Has the 1,000x energy efficiency been proven? A: No. Up to 1,000x is the company's target and claim for targeted workloads. The results disclosed for CN101 are a small-scale demonstration of MNIST and CIFAR-10 generation, plus a company-reported 62x cycle reduction for concurrent versus sequential execution. Power comparisons at commercial scale are a task for CN201 and later.

Q: How is auto-formalization different from the AI features of existing EDA? A: The starting point differs. Incumbent agentic EDA adds automation on top of an existing toolchain. Normal claims to first translate specifications into formal-logic models with an LLM, then center the flow on proving design correctness on those models. Its current commercial scope is DV and RTL automation.

Q: Why did Samsung Catalyst Fund invest? A: On the public record, because of the platform's potential to shorten time to market. The fund's head cited the potential to offer faster time-to-market for the most demanding chip design customers. Combined with the company's stated Korea expansion, this invites the interpretation of joint work with the Samsung ecosystem, but no specific joint project has been disclosed.

Q: Will thermodynamic chips replace GPUs? A: No. Exact deterministic computation remains digital hardware's domain. The Carnot chips target the seat of a heterogeneous accelerator for probabilistic workloads, sitting next to CPUs and GPUs and taking over sampling and generative inference.

Facts in this article were cross-checked as of October 22, 2026 against company announcements, the Hot Chips 2026 disclosures, academic papers and independent reporting. Figures and partner status marked as company claims or announcements are reproduced as sourced. Normal Computing is private and does not publish audited financial statements. Items that differ across sources or are undisclosed, such as headcount and the Series A amount, are flagged as such in the text.

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