VLSI KoreaDAC 2026 Topic Map: What 545 Papers Say, and the Seven Hottest Themes
Start with the full DAC 2026 map: 545 titles, official topic counts, seven transparent hot themes and the engineering boundaries that matter.
Read this first
- Full map: We extracted 545 research-paper titles from the official July 22 DAC 2026 program. The official top-level families are AI 159, Design 126, EDA 125, Security 64, Systems 57 and EDA/Chiplet 14.
- Hot topics: Transparent, overlapping title expressions find 69 LLM/generative/agent titles, 36 chiplet/2.5D/3D, 34 in-/near-memory, 31 security/privacy, 25 verification/formal, 23 quantum and 14 thermal/power-integrity titles.
- How to read it: Official categories describe program composition. Overlapping hot-topic matches describe recurring language and momentum. They are not interchangeable shares.
- Korea lens: Memory and packaging strength matters, but defensible differentiation requires end-to-end data movement, thermal/SI/PI, KGD/repair/yield and verifiable automation.
The first question in a DAC review should be what appeared and how often, not which thesis sounds most impressive. This review therefore starts with all 545 research titles, counts the official topic families, and only then applies VLSI Korea's overlapping hot-topic expressions. Research papers, company talks and booth demonstrations are different evidence classes and are not blended into one claim.
1. AI, Design and EDA were the three largest families
Normalizing the official topic field to one top-level family per title produces 159 AI papers, 126 Design papers and 125 EDA papers. Security contributes 64, Systems 57, and the 14 entries explicitly labeled “Chiplet, EDA, EDA1” remain a separate EDA/Chiplet cross-family. The total is exactly 545.
This prevents the lazy conclusion that DAC simply became an AI conference. AI is the largest single family, but it represents 29.2% of the title inventory. Design and EDA together account for 251 papers. The stronger reading is that AI has moved horizontally across architecture, verification, implementation and system optimization while the traditional closure problems remain large.
2. AI architecture, algorithms and systems were nearly equal in size
After combining Roman-numeral subdivisions under the same official code, AI4 Architecture Design has 38 papers, AI2 Algorithms and Models 37, and AI5 Systems and Platforms 37. They are followed by DES2B in-/near-memory architectures at 31, DES1 SoC and heterogeneous architectures at 30, and EDA7 physical design and verification at 30. AI3 applications and infrastructure reaches 28, while DES6 quantum computing reaches 23.
The program is therefore not centered on a model alone. Models and algorithms, the accelerators that execute them, and the memory, package, network and runtime that turn them into a system all move together. At the same time, design verification, RTL/HLS, analog CAD and DFM/reliability remain substantial. Real silicon still has to close.
3. Momentum becomes visible only with overlapping themes
A title can simultaneously concern an LLM, verification, a chiplet and thermal closure. The hot-topic layer is therefore non-exclusive. Across 545 titles, LLM/language-model/generative/agentic expressions match 69; chiplet/2.5D/3D matches 36; in-/near-memory, CIM or PIM matches 34. Security/privacy matches 31, verification/formal 25, quantum 23 and thermal/power integrity 14.
These are neither paper-quality rankings nor official DAC statistics. They show recurring title language under a disclosed expression. Some relevant papers will be missed because the word appears only in the abstract, and some matched titles may have a different primary contribution. The expressions and every matched title are downloadable.
4. AI at DAC runs in three engineering directions
The first direction is AI for EDA: Verilog and assertion generation, UVM, debug, formal, physical design, analog sizing and package optimization. The language model is not the oracle. Simulation, equivalence, formal proof, static timing and extraction remain the deterministic checks. An agent becomes useful only when it preserves constraints, reads tool state and records failure.
The second direction is design for AI: accelerators, sparsity, quantization, CIM/PIM and serving systems. The third is AI infrastructure: chiplets, 3D integration, thermal and power integrity, security, networks and packaging. Comparing peak TOPS alone ignores the movement, utilization and boundary-condition costs that dominate the second and third directions.
5. Representative papers should be read for the boundary they measure
Within the LLM axis, Fusedot addresses inference arithmetic, TOPCELL standard-cell topology optimization, and ChatSVA and UVMarvel verification-artifact generation. The chiplet set includes RTL-3D, ChiPlanner and AgenticDSE at different abstraction levels. S2CIM, PIMGRAG and Keeping PIM Busy respectively expose security, retrieval and execution-overhead questions in memory-centric computing.
Security papers such as SLCross and MistleTunnel target cache and TLB boundaries on Apple M-series systems, while Janus proposes a compiler-based defense. CryoZip, RISC-Q and Agent-Per-Qubit connect quantum error data, real-time control and placement. GEMIR, PIANO and COOL explore fast modeling for power integrity and thermal analysis, where transfer depends on physics, geometry and boundary conditions.
6. We kept official counts, editorial signals and evidence levels separate
The official family count uses the program topic field and counts each title once. The hot-topic count runs published regular expressions against title text and permits overlap. Representative-paper selection illustrates mechanism diversity. These layers answer different questions and use different denominators.
The accepted-paper ID page lists 544 IDs, while the July 22 program PDF yields 545 unique research titles. We did not delete a title to force agreement and do not infer an acceptance rate from the mismatch. DAC homepage and press-release language about AI and Design also uses different dated definitions; those marketing shares are not mixed into the paper-title denominator.
7. Korea should watch execution around memory, packaging and verification
Korean companies have direct exposure through HBM, DRAM, foundry, OSAT, substrates and mobile or automotive systems. The 34 in-/near-memory title matches show intense exploration, but success depends on compiler/runtime, consistency, utilization and total-system energy. The 36 chiplet and 3D matches do not end at package layout; SI/PI, thermals, known-good die, test access, repair and yield must close together.
Verification agents can offset labor constraints, but they merely move risk downstream if false fixes and regression escapes are not measured. Foundry ecosystems should track PDK portability, extraction correlation and mixed-signal closure. The 64 official Security-family papers are a reminder that AI and chiplets move trusted boundaries into software, packages and memory.
8. The next review indexes what major companies actually released for DAC
The research map is only half the picture. The companion company-material review covers official pages and named contributions from Synopsys, Cadence, Siemens EDA, NVIDIA, Intel, Microsoft, Keysight, Samsung, SK hynix, AMD/TSMC and IBM. Each record states what was disclosed, its present evidence level and what a reader still needs to verify.
Bottom line: The important DAC 2026 change is not simply that AI became large. AI, Design and EDA now form a continuous system problem, with memory, chiplets, verification, security and thermal constraints concentrated at the interfaces. Future sector reviews will start only after this full-edition map.
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Sources
- DAC 2026 official site
- DAC 2026 official program
- DAC 2026 research topics
- DAC 2026 accepted paper IDs
- DAC 2026 official July 22 program PDF
Editorial note: Official programs and company primary materials were structured with AI-assisted drafting and then passed through VLSI Korea evidence, visual and release gates. A program listing does not prove performance or production readiness. Corrections: [email protected]. Reproducible files: 545-title ledger · official category counts · hot-topic expressions and counts · all title matches.
Disclosure
This article is for information only and is not a recommendation to buy or sell any security. It is based on public materials and may contain errors in the sources or preparation. The author is employed by Synopsys, and VLSI Korea is operated independently of the employer. Company materials were reviewed under the same evidence standard, and the employment relationship did not determine editorial ranking or conclusions. Investment decisions and their outcomes remain the reader's responsibility.
