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Oracle Cloud Infrastructure Jumps 121%, NVIDIA Targets Supply-Chain Delays | Daily Silicon

Six semiconductor developments: Oracle results, NVIDIA supply-chain AI, cloud-site delays, routing demand, Renesas MPUs and 700nm RDL.

Imec Tower in Leuven, photographed in July 2018
Imec Tower in Leuven, photographed in July 2018. Research-partner reference, not an image of the 700nm RDL structures. Resized and converted to WebP; uncropped.

Executive Summary

01 Oracle cloud infrastructure revenue jumps 121%

Oracle sign at the Redwood Shores campus, photographed in May 2011
Oracle sign at the Redwood Shores campus, photographed in May 2011. Historical company reference, not newly delivered data-center capacity. Resized and converted to WebP; uncropped. · King of Hearts / Wikimedia Commons · CC BY-SA 3.0

TL;DR Oracle reported FY27 Q1 cloud infrastructure revenue of $7.4 billion, up 121% year over year, and 850MW of additional data-center capacity delivered. Quarterly operating cash flow was $23 billion while free cash flow was -$5 billion, showing the cash demands of the buildout. For chip suppliers, installed and operating infrastructure matters more than treating contracted backlog as revenue.

Sources · Oracle (2026-09-10)

02 NVIDIA and Palantir target the wait before GPUs start working

NVIDIA sign in Santa Clara, photographed in October 2020
NVIDIA sign in Santa Clara, photographed in October 2020. Company reference, not a photograph of the new supply-chain software. Resized and converted to WebP; uncropped. · Will Buckner / Wikimedia Commons · CC BY 2.0

TL;DR NVIDIA outlined a supply-chain approach combining Palantir Foundry, cuOpt and Nemotron to coordinate materials and allocation decisions for AI infrastructure. It connects operational data with models trained on planners’ reasoning, while retaining human decision-making. The target is a bottleneck outside chip performance: delivered servers cannot work until the necessary components and infrastructure are ready.

Sources · NVIDIA (2026-09-10)

03 Google–Blackstone venture faces reported site delays

Googleplex headquarters in Mountain View, California, photographed in July 2016
Googleplex headquarters in Mountain View, photographed in July 2016. Company reference, not a delayed cloud-venture site. Resized and converted to WebP; uncropped. · Asoundd; crop by Cristiano Tomás / Wikimedia Commons · CC BY-SA 4.0

TL;DR Bloomberg reported delays at some data-center sites for the Google–Blackstone cloud venture, citing unnamed sources. The venture’s CEO said the target of delivering 500MW in 2027 remains on track. Plans to rent Google processors depend on physical sites and permitting; the report does not establish cancellation of the overall venture.

Sources · Bloomberg / The Star (2026-09-10)

04 High-end routing revenue rises 25%; direct cloud sales rise 94%

Cisco Building 2 in San Jose, photographed in August 2006
Cisco Building 2 in San Jose, photographed in August 2006. Reference for a vendor covered by the market report, not newly shipped equipment. Resized and converted to WebP; uncropped. · Coolcaesar / Wikimedia Commons · CC BY-SA 3.0

TL;DR Dell’Oro reported 25% year-over-year growth in high-end routing and aggregation equipment revenue in Q2 2026. Vendor revenue from direct sales to cloud providers rose 94%. AI infrastructure demand also reaches the networks connecting data centers, but 94% describes the cloud-direct segment, not the whole market or unit shipments.

Sources · Dell’Oro / PR Newswire (2026-09-10)

05 Renesas RZ/G3L and RZ/G3SE share pins across display needs

Renesas offices in San Jose
Renesas offices in San Jose. The file metadata records April 2021, despite 2012 in its filename. Company reference, not the new MPU. Resized and converted to WebP; uncropped. · Cristiano Tomás / Wikimedia Commons · CC BY-SA 4.0

TL;DR Renesas launched the pin-compatible 64-bit RZ/G3L and RZ/G3SE MPUs. Configurations offer up to 4 Cortex-A55 cores at 1.2GHz plus a 200MHz Cortex-M33; G3L provides GPU and H.264 features while G3SE targets basic display needs. Shared pins can support board reuse across product tiers, but the quoted 1mW-level consumption is for deep standby, not active operation.

Sources · Renesas (2026-09-10)

06 Taiyo and imec demonstrate 700nm RDL structures

Imec Tower in Leuven, photographed in July 2018
Imec Tower in Leuven, photographed in July 2018. Research-partner reference, not an image of the 700nm RDL structures. Resized and converted to WebP; uncropped. · Kvdh / Wikimedia Commons · CC BY-SA 4.0

TL;DR Taiyo announced 700nm line and via dimensions in 3-layer RDL structures on a 12-inch wafer through research with imec. The dual-damascene approach uses an i-line photosensitive dielectric, with results presented at IEEE ESTC 2026. The 700nm figure describes redistribution structures, not a transistor process node; long-term reliability and volume-manufacturing suitability still require verification.

Sources · Taiyo / PR TIMES (2026-09-10)

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Disclosure

This article is provided for informational purposes only and does not constitute a recommendation to buy or sell any security. Figures and factual statements are based on publicly available sources, including company filings, news reports, and market research, and may contain errors in the source material or in the preparation of this article. The author may own shares in companies mentioned. All investment decisions and their outcomes are the reader's responsibility.

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