Which chips does SpaceX use? Separating Starlink terminals from satellites

To identify SpaceX's semiconductors, start with where the chips are installed. Public evidence identifies STMicroelectronics radio-frequency (RF) technology in Starlink ground terminals, processors and memory observed in a particular older terminal, and the selection of an STM32V8 microcontroller for inter-satellite laser systems. These findings are not a complete bill of materials for every Starlink satellite. This opening installment separates confirmed information from undisclosed details, establishing a foundation for comparing communication chips with the semiconductors needed by future orbital data centers.

VLSI Korea view — The value of a space semiconductor depends on its function and the system's response to failure. Treating ground antennas, satellite communication networks and orbital AI servers as one component market can distort both engineering and supply-chain analysis.

Engineers can use this distinction to decide whether a supplier's space announcement relates to their RF, power or memory design. Industry analysts can separate documented adoption from a company's ability to supply a product. The two practical decisions are where to place a new supplier announcement in the equipment architecture, and which additional test evidence to request when evaluating orbital computing. Sources were checked on 2026-09-28.

1. A Starlink terminal and a Starlink satellite are different equipment

The antenna terminal a customer installs on Earth does not travel into space. It exchanges radio signals with satellites and connects the user's network to the satellite service. Inside a satellite, communication payloads coexist with electronics for power, attitude control and health monitoring. A ground gateway is another equipment category, connecting the satellite network to terrestrial networks. Sharing a service name does not make these systems' temperatures, power budgets, radiation environments or repair options equivalent.

That distinction changes the meaning of “supplies SpaceX.” A ground-terminal design win does not establish adoption inside a satellite. Launch-vehicle electronics are separate from a Starlink communication payload's components. Launching another company's computing satellite does not mean SpaceX designed or bought its processor. A supplier map that omits the equipment can exaggerate corporate connections while obscuring actual functions.

ST's customer account describes BiCMOS technology in terminal phased-array antennas. It also identifies STM32V8 as selected for the mini laser systems linking Starlink satellites. These are vendor statements of adoption. They do not disclose every satellite generation's complete component list, quantities or individual operational history. This article therefore treats ground RF technology and satellite MCU selection within their respective boundaries. ST customer account

The same separation matters when comparing these systems with a conventional data center. A server is organized around computation and data movement; a satellite-internet terminal must first transmit and receive radio signals in the right direction. Its chips' value can depend more directly on RF loss, noise, phase control and power than on matrix arithmetic. Processing data for communication does not, by itself, imply a need for large AI-training accelerators.

2. Steering a radio beam without continuously turning the antenna

A phased array applies relative phase differences to signals from multiple antenna elements. The signals reinforce one another in a selected direction and combine less strongly in others. Phase describes the position of a repeating wave within its cycle. Adjusting the relative timing of the elements changes the direction in which their signals align in the far field. Electronic steering is therefore one way to track a satellite without continuously rotating the entire antenna mechanically.

Consider an illustrative array, not a disclosed Starlink design. At 12 GHz, approximating the speed of light as 300,000 km/s gives a wavelength of about 25 mm. With half-wavelength spacing of 12.5 mm, steering 30° from broadside requires a phase-step magnitude of 90° between adjacent elements. The relation is Δφ = 360° × (d/λ) × sinθ. The sign depends on the coordinate and transmit/receive conventions, so only the magnitude is calculated here. Analog Devices' array explanation

The chart applies the same principle to an ideal 8-element linear array. It assumes uniform amplitudes, half-wavelength spacing and identical elements, excluding element patterns, mutual coupling and losses. It illustrates how phase settings change the main beam's direction, not a product's gain or service coverage. A real planar array must also address steering in both dimensions, calibration and heat from surrounding circuitry.

The RF challenge is that the circuitry used to shape the beam introduces loss and error. Even with nominally correct phase settings, unequal path amplitudes or temperature-dependent delays distort the ideal pattern. Driving amplifiers harder can increase power and heat. Designers balance calibration accuracy, circuit efficiency, manufacturing variation and cost. The competitiveness of an RF chip therefore cannot be explained by the smallest process-node number alone.

The BiCMOS technology ST identifies addresses one part of this RF problem. Panel-level packaging addresses assembly and manufacturing at scale. Making a device work and producing many terminals consistently are connected but distinct tasks. Assessing a process or packaging capability requires attention to frequency, loss, heat and assembly yield; possessing that capability is not evidence of being a Starlink supplier.

3. A terminal also contains a processor, working memory and storage

Security researcher Lennert Wouters' BruCON presentation in 2022 documented the circular Starlink terminal hardware he examined. It identified a custom ST quad-core Arm Cortex-A53 SoC, an STSAFE-A110 secure element, 4 GB of eMMC and 2 DDR3 devices marked 4 Gbit each. The RF section identified SHIRAZ digital beamformers and PULSAR front-end modules. These are observations from a particular hardware analysis, not a statement about every terminal sold today or about electronics inside satellites. Original presentation

Separating component roles reveals a small complete system. A processor executes software and manages device operation. DRAM provides volatile working space for active code and data; eMMC retains stored information when power is removed. A secure element provides a separate component for authentication and trust boundaries. These descriptions explain the general roles of the component classes; they do not reconstruct undisclosed Starlink firmware or its detailed processing paths.

Capacity notation also matters. Gbit and GB are different units. The nominal total of 2 devices marked 4 Gbit is 8 Gbit, corresponding to 1 GB when converting bits to bytes. This arithmetic adds labeled device capacities; it is not a measurement of memory available to the operating system. Inferring boot reservations or software consumption would exceed the observation. Preserving units is as important as identifying the part.

Comparing this memory with HBM in an AI server first exposes a difference in interface purpose, rather than a simple capacity contest. Working memory for terminal-control software and a memory hierarchy feeding a large accelerator are selected against different requirements. Observing DDR3 in an older terminal does not establish DDR3 use in a current satellite, nor prove that configuration adequate for orbital AI computation. One is an observation; the other requires a separate design evaluation.

Teardowns are useful precisely when their sampling boundaries remain visible. Components can change with production date, board revision and regional model. Similar external housings do not guarantee identical internals. When using older teardown material for supply-chain analysis, retain the presentation year and the examined hardware generation. This helps avoid turning historical adoption into a current shipment-wide revenue assumption.

4. A laser-system MCU does a different job from an AI accelerator

ST introduces STM32V8 as an Arm Cortex-M85 microcontroller, describing an 18 nm FD-SOI process, 800 MHz operation and 4 MB of embedded phase-change memory (PCM). The same material says SpaceX selected the device for Starlink mini laser systems. The evidence concerns product characteristics and selection. It does not make the MCU's embedded memory equivalent to server HBM, or establish independently verified operation across all satellites. ST's STM32V8 technical introduction

A microcontroller commonly reads sensors, evaluates state and controls peripherals within timing constraints. In optical communications, those control functions should be distinguished from the path carrying high-speed data. A link can combine a laser source, modulation and reception, signal processing, pointing equipment and a controller. That does not mean the MCU processes every transmitted bit in software. The diagram illustrates this general functional separation; it does not claim to reproduce Starlink's circuit implementation.

Boundary condition — An optical link's data rate is not its control MCU's processing rate. Being part of the same system does not make either number evidence for the other.

PCM should likewise be interpreted by function. Embedded nonvolatile memory can retain code and state needed after power is restored. Its design objective differs from supplying large tensors to an accelerator at high bandwidth. A statement that a new memory technology is used in space is insufficient to predict which memory supplier or market it will displace. First establish location, interface, capacity, write characteristics and the actual job.

The FD-SOI process name is not a guarantee that every space-environment problem has been solved. Radiation response depends on circuitry and operating conditions as well as device structure, particle type, energy and test method. Recognizing a process advantage is different from approving a device for a mission. Selection announcements need complementary evidence about testing and system protection before their reliability implications can be defined.

5. Power-conversion losses become a system thermal problem

RF, digital and optical circuits all need suitable voltages and stable power. Conversion losses become heat. Even a capable chip cannot sustain its performance if power delivery and the thermal path cannot support it. This also applies on Earth, but limited mass and difficult repair make the interaction among power, temperature and lifetime especially important early in spacecraft design.

Hold an illustrative load at 90 W. At 90% conversion efficiency, input power is 100 W and loss is 10 W. At 95%, input becomes approximately 94.74 W and loss approximately 4.74 W. Input falls by about 5.26 W, with the same reduction in heat generated by that conversion stage. The equations are input power = load power/efficiency and loss = input power−load power. These are assumed values explaining efficiency, not Starlink measurements or a named power chip's specification.

The measurement boundary must remain clear. Wall input, power-supply output, board input and chip power are different quantities. Multiple conversion stages require their respective efficiencies and fixed losses. Assigning an entire device's consumption to a single RF chip misstates both power delivery and heat removal. Efficiency can vary with temperature and load, so a single peak efficiency also cannot establish operating endurance.

Calling space cold does not solve cooling. A vacuum provides no surrounding air to carry heat away by convection. Internal heat must travel through structures and thermal paths before being radiated outward. Proposing to operate terminal-class electronics in orbit therefore requires verification of the entire heat-removal path, not simply whether the silicon functions. Larger radiators add area and mass; lower-power operation can reduce throughput. The optimum depends on the mission.

6. An orbital data center changes more than the chip

A ground data center and an orbital computing system do not necessarily require different silicon. Commercial components may be candidates, but choosing the same chip does not eliminate different board- and spacecraft-level verification needs. NASA's small-spacecraft avionics material discusses commercial components alongside radiation and reliability. Meeting a public product specification and maintaining a mission for a particular duration in a particular orbit are separate questions. NASA's small-spacecraft avionics reference

Total ionizing dose (TID), displacement damage and single-event effects (SEE) must be distinguished. Error-correcting codes (ECC) can correct some memory-bit errors without curing power-path latch-up or every form of incorrect computation. Systems may combine detection, retries, resets, power cycling and recovery. The required combination depends on device testing and the mission's tolerated failure modes.

On Earth, operators can replace failed equipment and service cooling infrastructure. Those operating assumptions do not transfer readily to orbit. Redundancy consumes mass and power, while checkpointing and recomputation can reduce useful throughput. Comparing orbital AI servers with ground servers therefore requires more than a chip's peak arithmetic rate: work delivered after recovery, memory and communication bottlenecks, and sustained performance under thermal limits all matter. This is the central question of the next installment.

The Korean semiconductor industry's potential connections are also best understood by function. Memory, power conversion, RF packaging and optical connectivity are relevant technical areas. A Korean company's product portfolio does not establish a SpaceX supply contract. Supply-chain claims become stronger only with customer disclosure, part identification for the relevant generation, test results and production scope. This article does not estimate undisclosed Korean supplier wins or revenue.

The distinction between today's communication satellites and future large computing satellites ultimately rests on their workloads. Focusing radio energy, controlling a laser link and feeding a large model with memory bandwidth require different semiconductor combinations. The next useful evidence is mission-linked testing, not simply a more familiar chip name. Over the next 6–12 months, watch for official component information for new generations, radiation results with disclosed conditions, and orbital computing results that report errors, recovery and sustained throughput. The next review date is 2027-03-28, with earlier updates if material evidence appears.

For memory recovery mechanisms, continue with LEO memory reliability: ECC, scrubbing and checkpoint recovery. The next installment compares what must change in chips, boards, cooling and operations when taking a terrestrial GPU into an orbital data center.

Sources

1. ST — SpaceX customer story: vendor-disclosed applications.
2. ST — STM32V8: device characteristics and laser-system selection.
3. Lennert Wouters — BruCON 2022: observations of a particular terminal generation.
4. Analog Devices — Phased Array Antenna Patterns, Part 1: antenna-array fundamentals.
5. NASA — Small Spacecraft Avionics: spacecraft electronics selection and reliability context.

The cover is an AI-generated concept illustration, not a photograph of Starlink hardware. VLSI Korea created the body diagrams and calculations. The text distinguishes manufacturer statements, observations of a particular terminal and illustrative calculations.

Disclosure

*This article is provided for informational purposes only and does not constitute a recommendation to buy or sell any security. Figures and factual statements are based on publicly available sources, including company filings, news reports, and market research, and may contain errors in the source material or in the preparation of this article. The author may own shares in companies mentioned. All investment decisions and their outcomes are the reader's responsibility.*