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Nscale IPO, Crusoe Funding and Solidigm’s US NAND Fab Talks | Daily Silicon

Ten semiconductor developments: Nscale’s proposed IPO, Crusoe’s funding, Solidigm’s reported US NAND plans, Tata–Nexperia and chip security.

BAE Systems head office at 6 Carlton Gardens, London, September 2011
BAE Systems head office at 6 Carlton Gardens, London, September 2011. Historical company reference, not the RH45 production site in New York. Resized and converted to WebP; uncropped.
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Executive Summary

01 Nscale files for a US IPO; pricing remains open

New Burlington Place, London, June 2023
New Burlington Place, London, June 2023. Geographic reference to the registered address in Nscale’s filing, not a data center. Resized and converted to WebP; uncropped. · No Swan So Fine / Wikimedia Commons · CC BY-SA 4.0

TL;DR Nscale filed an S-1 with the SEC for a proposed IPO and applied to list on the NYSE as NSCL. The share count and price range have not been determined.

This could open another financing channel for GPU infrastructure. Filing is not a completed offering, a trading debut or cash received. For suppliers, it matters as a prospective customer funding route; for investors, public disclosures offer a way to test the private-market narrative.

GPU purchases and revenue collection run on different clocks. Power connections and customer acceptance can delay cash generation after equipment has been acquired. Offering terms, use of proceeds and facility commissioning deserve to be read together. A listing alone does not shorten the investment payback period.

Sources · Nscale / SEC · SEC S-1, September 18 (2026-09-18)

02 Crusoe announces initial closing of an expected $3.9 billion round

NVIDIA sign in Santa Clara, October 2020. Investor reference, not a Crusoe facility.
NVIDIA sign in Santa Clara, October 2020. Investor reference, not a Crusoe facility. Resized and converted to WebP. · Will Buckner / Wikimedia Commons · CC BY 2.0

TL;DR Crusoe announced the initial closing of an anticipated $3.9 billion Series F at a $30.9 billion post-money valuation. NVIDIA is among the investors.

Catch-up on the September 17 announcement or report, not a new announcement today.

The company reports more than $140 billion in total contracted value, not annual revenue. It separates over 6GW of gross contracted capacity from 1GW delivered and operational. Contracts, energized infrastructure and recognized revenue are different stages.

For chip demand, watch commissioning after the financing headline. Power availability and server delivery must align before GPUs and memory become productive assets. The announcement advances expansion financing; it does not establish that the whole $3.9 billion has been received or that all contracted capacity is operating.

Sources · Crusoe (2026-09-17)

03 Solidigm reportedly weighs a US NAND fab, separate from Ohio talks

SK hynix H27QEG8VEE8R NAND in an Intenso SSD, November 2023
SK hynix H27QEG8VEE8R NAND in an Intenso SSD, November 2023. Historical parent-company product reference, not a new Solidigm fab or current product announcement. Resized and converted to WebP; uncropped. · Raimond Spekking / Wikimedia Commons · CC BY-SA 4.0

TL;DR Reuters reports that Solidigm is considering a US NAND fab, with upstate New York a leading candidate. SK hynix says it is reviewing options but has confirmed no specific plan.

This is separate from previously reported SK hynix–Intel discussions concerning Ohio. Combining them would confuse the projects and their potential supply effects. The report relies on unnamed sources; it is not a site-selection or groundbreaking announcement.

US production could reduce dependence on Dalian and exposure to trade restrictions, but also brings manufacturing and ramp costs. Process transfer and qualification matter for engineers; committed capex and genuinely incremental output matter for investors. The report does not establish when additional NAND supply would arrive.

Sources · Reuters via Korea JoongAng Daily (2026-09-18)

04 Japan–US talks reportedly include a GlobalFoundries-operated fab

GlobalFoundries Fab 1 in Dresden, July 2011. Company reference, not the proposed US fab.
GlobalFoundries Fab 1 in Dresden, July 2011. Company reference, not the proposed US fab. Resized and converted to WebP. · Fensterblick / Wikimedia Commons · CC BY-SA 3.0

TL;DR Nikkei reports discussions over a semiconductor fab within the Japan–US investment agreement. Reuters relays a proposed ¥2 trillion–¥3 trillion project operated by GlobalFoundries.

Catch-up on the September 17 announcement or report, not a new announcement today.

The report concerns logic semiconductors, but Nikkei cited no sources. It is not a confirmed investment announcement from either government or GF. Process selection, customers and capacity remain essential before treating the proposal like committed expansion.

Financing a fab and carrying its manufacturing risk are separate questions. Equipment purchases and customer commitments must connect before the supply chain changes. Talks are a meaningful signal, but they do not establish orders for a particular equipment supplier or relief for a specific product shortage.

Sources · Reuters / Nikkei (2026-09-17)

05 Nexperia and Tata connect Indian wafer and packaging plans

Bombay House, Tata Group headquarters in Mumbai
Bombay House, Tata Group headquarters in Mumbai. Photograph date not recorded. Group reference, not the Dholera or Jagiroad semiconductor facilities. Resized and converted to WebP; uncropped. · AroundTheGlobe / Wikimedia Commons · CC BY-SA 3.0

TL;DR Nexperia and Tata Electronics announced cooperation across wafer fabrication, assembly and test. They are preparing MOSFET production at the upcoming 300mm Dholera fab and discrete-device back-end work at Jagiroad.

Catch-up on the September 17 announcement or report, not a new announcement today.

Wafer diameter does not identify an advanced logic node. The announced scope is MOSFETs and discrete products. Laying the groundwork for production is different from shipping those products at volume from India.

Preparing both manufacturing stages could shorten a fragmented logistics and qualification chain. Execution still depends on process transfer, package and test readiness, and customer approval. The announcement does not support an invented ramp date or annual output figure.

Sources · Nexperia (2026-09-17)

06 D-Robotics closes $400 million for robot chips and software

Hong Kong skyline, June 2019
Hong Kong skyline, June 2019. Geographic reference to the D-Robotics release dateline, not a company office, chip or robot. Resized and converted to WebP; uncropped. · Benh LIEU SONG ( Flickr ) / Wikimedia Commons · CC BY-SA 4.0

TL;DR D-Robotics announced the closing of a $400 million Series C. It plans to expand Sunrise chips and software spanning robot development.

Its disclosed cumulative shipment figure exceeds 8 million Sunrise chips. That is not S600 sales alone or a count of humanoid robots. Chip-family shipments and finished-robot demand need different denominators.

Robot developers need sensors, model execution and control software to work together. The investment matters as a bid to reduce that integration burden, rather than simply produce a larger chip specification. Announced customer adoption does not establish recurring revenue or customer-by-customer production volumes.

Sources · D-Robotics / PR Newswire (2026-09-17)

07 EVAS reportedly raises nearly RMB2 billion for RISC-V AI compute

China Mobile Innovation Building in Beijing, May 2025
China Mobile Innovation Building in Beijing, May 2025. Reference to the group behind EVAS’s previously reported May 2026 strategic investor, not the new financing or an EVAS facility. Resized and converted to WebP; uncropped. · N509FZ / Wikimedia Commons · CC BY-SA 4.0

TL;DR Chinese specialist publication 芯东西 reports that EVAS raised nearly RMB2 billion. The company describes an AI architecture using RISC-V and vector extensions on its official site.

The funding amount is attributed reporting, not a payment record we inspected. Estimated valuation should not be treated as a settled transaction price. An instruction set also does not establish application throughput or energy efficiency.

Compilers, operators, memory movement and inter-chip communication must work together. EVAS describes Epoch chips and ELink, but that does not provide a controlled comparison with competing GPUs. Customer workload costs and software-porting effort are the useful next checks.

Sources · 芯东西 / EVAS · EVAS official technology overview · Earlier China Mobile investment, May 8 (2026-09-18)

08 DOE proposes up to $215 million for fault-tolerant quantum computing

US Department of Energy Forrestal Building, Washington
US Department of Energy Forrestal Building, Washington. Photograph date not recorded in the source. Agency reference, not a quantum computer. Resized and converted to WebP; uncropped. · US Department of Energy / Wikimedia Commons · Public domain

TL;DR DOE announced the Quantum Genesis Q competition with up to $215 million in planned funding. Outyear funding depends on congressional appropriations.

Catch-up on the September 17 announcement or report, not a new announcement today.

The target includes at least 100 logical qubits and hundreds of millions of fault-tolerant operations. Counting physical qubits alone cannot demonstrate that capability. Error management and successful program execution matter alongside hardware scale.

This is a performance incentive, not a contract awarded to a named supplier. Control electronics and verification are part of the systems challenge. Applications close October 19; selections and demonstrations will show which implementations actually receive support.

Sources · US Department of Energy · Grants.gov competition notice (2026-09-17)

09 Rambus details the integration work around Caliptra

Googleplex, Mountain View, July 2016. Caliptra founding-participant reference, not a Rambus facility or a security product.
Googleplex, Mountain View, July 2016. Caliptra founding-participant reference, not a Rambus facility or a security product. Resized and converted to WebP. · Asoundd; crop by Cristiano Tomás / Wikimedia Commons · CC BY-SA 4.0

TL;DR Rambus described CryptoManager Root of Trust integration for use with the Caliptra specification. It connects the trust foundation with protected keys, drivers and a secure execution environment.

Catch-up on the September 14 announcement or report, not a new announcement today.

Adopting a core is not the same as deploying a secure SoC. Boot flows, provisioning, lifecycle management and integration remain. Rambus says its approach preserves an unmodified Caliptra implementation while adding commercial deployment infrastructure.

Engineers should compare integration scope and verification responsibility. Certification-oriented support does not mean a finished customer chip is certified. The announcement does not independently establish attack resistance or schedule savings; design interfaces and security boundaries still need examination.

Sources · Rambus · Rambus product scope · OCP: Caliptra founding participants (2026-09-14)

10 BAE receives $16 million for RH45 radiation-hardening qualification

BAE Systems head office at 6 Carlton Gardens, London, September 2011
BAE Systems head office at 6 Carlton Gardens, London, September 2011. Historical company reference, not the RH45 production site in New York. Resized and converted to WebP; uncropped. · Minky69 / Wikimedia Commons · CC BY-SA 4.0

TL;DR BAE Systems announced $16 million in funding to demonstrate and qualify RH45 technology. Manufacturing uses GF’s 45nm SOI platform in Malta, New York.

Catch-up on the September 16 announcement or report, not a new announcement today.

Comparing the node number with a consumer processor misses the purpose: reliability in demanding radiation environments. The ASIC Storefront offers building blocks and a design/manufacturing foundation for customer-specific circuits.

The contract concerns demonstration and qualification. Funding is not proof of qualification for every mission or committed customer volumes. Long-life applications value a sustainable manufacturing and verification route as well as transistor scaling. Qualification results and actual program adoption are the next checks.

Sources · BAE Systems (2026-09-16)

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Disclosure

This article is provided for informational purposes only and does not constitute a recommendation to buy or sell any security. Figures and factual statements are based on publicly available sources, including company filings, news reports, and market research, and may contain errors in the source material or in the preparation of this article. The author may own shares in companies mentioned. All investment decisions and their outcomes are the reader's responsibility.

Frequently Asked Questions

What did Nscale file for its proposed IPO?

Nscale filed an S-1 with the SEC for a proposed IPO and applied to list on the NYSE as NSCL. The share count and price range have not been determined, so the filing is not a completed offering or cash received.

What did Crusoe announce in its Series F?

Crusoe announced the initial closing of an anticipated $3.9 billion Series F at a $30.9 billion post-money valuation, with NVIDIA among the investors. It reports more than $140 billion in total contracted value, not annual revenue, and separates over 6GW of gross contracted capacity from 1GW delivered and operational.

How much did D-Robotics raise in its Series C?

D-Robotics announced the closing of a $400 million Series C to expand Sunrise chips and software for robot development. Its disclosed cumulative shipment figure exceeds 8 million Sunrise chips, which is not a count of finished robots.

What does the DOE Quantum Genesis Q competition target?

The DOE announced the Quantum Genesis Q competition with up to $215 million in planned funding, subject to congressional appropriations for outyears. The target includes at least 100 logical qubits and hundreds of millions of fault-tolerant operations.

What did Nexperia and Tata Electronics announce in India?

Nexperia and Tata Electronics announced cooperation across wafer fabrication, assembly and test, preparing MOSFET production at the upcoming 300mm Dholera fab and discrete-device back-end work at Jagiroad. The announced scope is MOSFETs and discrete products, not advanced logic.

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