What is Unate / Non-unate Cell in Static Timing Analysis?

What is Unate / Non-unate Cell in Static Timing Analysis?

When you study digital circuit design, you come across unate / non-unate cell, and at first you think, "What's the point?"

Unateness is a criterion for STAs to "safely and monotonically define the worst case with simple rules". This is to reduce performance (runtime) and pessimism.

1) Unate / Non-unate: One-line definition

  • Unate cell: an input transition (rise/fall) monotonically determines the output transition direction for a given input pin.
    → STA can fix the transition direction and compute the worst case. Therefore, the number of cases that need to be calculated is small.
  • For example, an AND Gate will either have an input pin transition, and the output pin will have a signal transition in the same direction, or it will keep the previous signal.
    • This is called a Positive unate.
    • Conversely, if the output pin signal moves in the opposite direction of the input pin, this is called a Negative unate.
  • Non-unate cell: The direction of the output transition may vary depending on the situation (different input states/conditions).
    → STA cannot fix the transition direction, so case split is required.

In other words, "non-unate branches the timing arc/transitive case and enumerates the different cases. (partial enumeration)."


2) Why Liberty's timing_sense is important

A library (.lib) usually contains the following.

  • timing_sense: positive_unate
  • timing_sense: negative_unate
  • timing_sense: non_unate

What this line does is simple:

It allows an STA engine like PrimeTime to determine which timing arcs are 'prunable based on Monotonicity'.

Unate side:

  • The transition direction of the corresponding pin is fixed, so
  • there are fewer candidate arcs/cases.

Non-unate side:

  • The possible arcs/cases are viewed more broadly, so
  • runtime↑ + pessimism↑ are more likely.

3) 왜 “퍼포먼스 때문만”은 아닌가

맞다, non-unate can slow down STA due to branching.
But more importantly:

Unate makes it easy for STA to make a "safe upper bound" (conservatism that doesn't miss the worst case) by making the monotonicity assumption.
Non-unate breaks that assumption, forcing the engine to be more conservative (=pessimistic)."

In other words, unate/non-unate is not an "engine optimization trick", but an assumption condition of the STA math model.


4) Why non-unate cells are a headache in timing calculations

(1) XOR: A classic non-unate

In an XOR, the "direction" in which the input change affects the output is not fixed.

Consequences:

  • Increased timing arc/case
  • Difficult to prune
  • More pessimistic behavior may be verified in the STA than in the actual circuit.

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